James Webb Space Telescope (JWST)
Space · 2018
Project details
Designed and verified the Data Compression FPGA using Actel RTSX72 for the James Webb Space Telescope (JWST) observatory.

Top-Quality Digital Design & Verification Solutions
Ingenion architects, designs, and develops test benches that thoroughly and completely verify customer designs. The practice delivers cost-efficient, thorough, powerful, and easy-to-use digital design and verification solutions for complex systems.
Omar HaddadChief Engineer
Albert DiCroceSenior Engineer I
Timothy SchererIntermediate Engineer
Custom-made test benches built to verify the operation of digital designs against their engineering requirements.
Analyzing and reviewing design requirements and specifications for completeness, testability, and traceability.
Architecting simulation and lab testing environments using automated, self-checking directed and random-constrained tests, and compiling verification plans to show requirement traceability.
Purchasing, integrating, and testing unified test bench elements, including COTS equipment and programmable systems managed by custom test software.
Developing documented, revision-controlled IP cores and software to implement specialized verification test benches.
Providing thorough documentation that fully describes the capability, use, and operation of the verification environment.
Performing coverage analysis using tools and methods to address gaps and demonstrate the completeness of the delivered test bench.
Providing ongoing technical support after delivery and verification, addressing late-phase design changes or latent bugs.
Independent review and engineering peer reviews for mature or early-phase projects to ensure design robustness.
Reviewing synthesizable RTL, verification code, design flow, and FPGA architecture, including code walk-throughs and requirements analysis.
Conducting early-phase peer reviews of initial draft RTL code, verification code, design flow, and architectures when adjustments are easiest to implement.
Space · Defense · Aerospace
Space · 2018
Designed and verified the Data Compression FPGA using Actel RTSX72 for the James Webb Space Telescope (JWST) observatory.
Space · Client: NASA
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